Sub-micron including sub-quarter-micron multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio (opening depth: width) apertures, for example 4:1, including, vias, metal interconnect lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
Copper and copper alloys have become the metal of choice for filling sub-micron, high aspect ratio interconnect features on semiconductor substrates. Copper and its alloys have lower resistivity and higher electromigration resistance compared to other metals such as, for example, aluminum. These characteristics are critical for achieving higher current densities increased device speed.
As circuit densities increase, the widths of vias, contacts, metal interconnect lines, and other features, decrease to sub-micron including sub-quarter-micron dimensions, whereas the thickness of the dielectric layers, through the use low-k (low dielectric constant) materials, has remained about the same. Consequently, the aspect ratios for the features, i.e., their depth to width ratio, has increased thereby creating additional challenges in adequately filling the sub-micron features with, for example, copper metal. Many traditional deposition processes such as physical vapor deposition (PVD) and chemical vapor deposition (CVD) have difficulty filling increasingly high aspect ratio features, for example, where the aspect ratio exceeds 2:1, and particularly where it exceeds 4:1.
As a result of these process limitations, electrochemical plating (ECP) also referred to as electrodeposition, which has previously been limited to the fabrication of patterns on circuit boards, is a preferable method for filling high aspect ratio metal interconnects structures such as via openings and trench line openings on semiconductor devices. Typically, ECP uses an electrolyte including positively charged ions of deposition material, for example copper metal ions, in contact with a negatively charged substrate (cathode) having a source of electrons to deposit (plate out) the metal ions onto the charged substrate, for example, a semiconductor wafer. A thin metal layer (seed layer) is first deposited on the semiconductor wafer by PVD methods to form a liner within the high aspect ratio anisotropically etched features to provide a continuous electrical path across the surfaces. An electrical current is supplied to the seed layer whereby the semiconductor wafer surface including anisotropically etched features are electroplated with an appropriate metal, for example, copper, to conformally deposit the metal to fill the features.
In filling the via openings and trench line openings with metal, for example, copper, electroplating is a preferable method to achieve superior step coverage of sub-micron etched features. The method generally includes first depositing a barrier layer over the etched opening surfaces, such as via openings and trench line openings, depositing a metal seed layer, for example copper, over the barrier layer, and then electroplating a metal, for example copper, over the seed layer to fill the etched features to form conductive vias and trench lines. Finally, the electro deposited layer and the dielectric layers are planarized, for example, by chemical mechanical polishing (CMP), to define a conductive interconnect feature.
Metal electroplating (electrodeposition) in general is a well-known art and can be achieved by a variety of techniques. Common designs of cells for electroplating a metal on semiconductor wafers involve positioning the plating surface of the semiconductor wafer within an electrolyte solution including an anode with the electrolyte impinging perpendicularly on the plating surface. The plating surface is contacted with an electrical power source forming the cathode of the plating system such that ions in the plating solution deposit on the conductive portion of the plating surface, for example a semiconductor wafer surface.
More recent electroplating processes use a relatively high current, for example 100 to 1000 mA/cm2, to improve semiconductor wafer throughput. During the electroplating process anisotropically etched features are conformally filled with for example, a copper or copper alloy metal. One problem according to prior art ECP processes is that spheroid shaped copper particles, for example as large as 0.2 microns, remain attached to the copper plating surface following the ECP process. It is believed that these spheroid particles form in part due to the high concentration of copper in the electrolyte solution needed to adequately fill the anisotropically etched features without forming voids or gaps in the feature. Although the copper spheroid particles are subsequently removed in a copper CMP process the presence of the copper particles on the surface obscures potential underlying ECP defects in optical scanning processes following the ECP process used to assure the quality of the ECP process. In addition undesirable scratching of the semiconductor surface by the copper particles during CMP occurs. As a result, semiconductor wafer quality and yield are adversely affected.
Prior art approaches to avoiding electrodeposition surface copper particles have included altering the ECP parameters including deposition waveforms and currents toward the end of the deposition process. Frequently, these approaches have introduced additional defects into the electroplated surface and have not been fully effective in eliminating the copper particles from the deposition surface.
These and other shortcomings demonstrate a need in the semiconductor processing art to develop a method for electrodeposition whereby copper particle defects remaining on the electroplating surface following an electrochemical deposition process are reduced or avoided.
It is therefore an object of the invention to provide a method for electrodeposition whereby copper particle defects remaining on the electroplating surface following an electro-chemical deposition process are reduced or avoided while overcoming other shortcomings and deficiencies in the prior art.